In-memory data parallel processor

Daichi Fujiki, Scott Mahlke, Reetuparna Das

研究成果: Conference contribution

58 被引用数 (Scopus)

抄録

Recent developments in Non-Volatile Memories (NVMs) have opened up a new horizon for in-memory computing. Despite the significant performance gain offered by computational NVMs, previous works have relied on manual mapping of specialized kernels to the memory arrays, making it infeasible to execute more general workloads. We combat this problem by proposing a programmable in-memory processor architecture and data-parallel programming framework. The efficiency of the proposed in-memory processor comes from two sources: massive parallelism and reduction in data movement. A compact instruction set provides generalized computation capabilities for the memory array. The proposed programming framework seeks to leverage the underlying parallelism in the hardware by merging the concepts of data-flow and vector processing. To facilitate in-memory programming, we develop a compilation framework that takes a TensorFlow input and generates code for our inmemory processor. Our results demonstrate 7.5× speedup over a multi-core CPU server for a set of applications from Parsec and 763× speedup over a server-class GPU for a set of Rodinia benchmarks.

本文言語English
ホスト出版物のタイトルProceedings of the 23rd International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2018
出版社Association for Computing Machinery
ページ1-14
ページ数14
53
2
ISBN(電子版)9781450349116
DOI
出版ステータスPublished - 2018 3月 19
外部発表はい
イベント23rd International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2018 - Williamsburg, United States
継続期間: 2018 3月 242018 3月 28

Conference

Conference23rd International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2018
国/地域United States
CityWilliamsburg
Period18/3/2418/3/28

ASJC Scopus subject areas

  • コンピュータ サイエンス(全般)

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