Isotopically engineered silicon nanoelectronics

Kohei M. Itoh

doi:10.1109/IEDM.2007.4418931

Isotopically engineered silicon nanoelectronics

Kohei M. Itoh

物理情報工学科

研究成果: Conference article

抜粋

Isotope engineering of silicon has been employed towards development of silicon-based quantum computers and complete modeling of nano-CMOS fabrication processes towards development of next-generation technology computer aided design (TCAD) systems.

元の言語	English
記事番号	4418931
ページ（範囲）	303-306
ページ数	4
ジャーナル	Technical Digest - International Electron Devices Meeting, IEDM
DOI	https://doi.org/10.1109/IEDM.2007.4418931
出版物ステータス	Published - 2007 12 1
イベント	2007 IEEE International Electron Devices Meeting, IEDM - Washington, DC, United States 継続期間: 2007 12 10 → 2007 12 12

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Condensed Matter Physics
Electrical and Electronic Engineering
Materials Chemistry

文献にアクセス

10.1109/IEDM.2007.4418931

フィンガープリント Isotopically engineered silicon nanoelectronics' の研究トピックを掘り下げます。これらはともに一意のフィンガープリントを構成します。

これを引用

Itoh, K. M. (2007). Isotopically engineered silicon nanoelectronics. Technical Digest - International Electron Devices Meeting, IEDM, 303-306. [4418931]. https://doi.org/10.1109/IEDM.2007.4418931

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