抜粋
JUMP-1 is currently under development by seven Japanese universities to establish techniques of an efficient distributed shared memory on a massively parallel processor. It provides a coherent cache with the reduced hierarchical bit-map directory scheme to achieve cost effective and high performance management. Messages for coherent cache are transferred through a fat tree on the RDT (Recursive Diagonal Torus) interconnection network. The JUMP-1 router supports versatile functions including multicast and acknowledge combining for the reduced hierarchical bit-map directory scheme.
| 元の言語 | English |
|---|---|
| ページ（範囲） | 158-164 |
| ページ数 | 7 |
| ジャーナル | Conference Proceedings - International Phoenix Conference on Computers and Communications |
| 出版物ステータス | Published - 1996 1 1 |
| イベント | Proceedings of the 1996 IEEE 15th Annual International Phoenix Conference on Computers and Communications - Scottsdale, AZ, USA 継続期間: 1996 3 27 → 1996 3 29 |
ASJC Scopus subject areas
- Computer Science(all)
フィンガープリント JUMP-1 router chip: A versatile router for supporting a distributed shared memory' の研究トピックを掘り下げます。これらはともに一意のフィンガープリントを構成します。
これを引用
Nishi, H., Nishimura, K., Anjo, K. I., Kudoh, T., & Amano, H. (1996). JUMP-1 router chip: A versatile router for supporting a distributed shared memory. Conference Proceedings - International Phoenix Conference on Computers and Communications, 158-164.