抄録
Asymmetric body bias control technique is proposed and evaluated. Compared to the conventional symmetric body bias control, the proposed technique provides finer performance control. Real chip measurements proved the feasibility of leakage reduction when asymmetric body bias is employed. In our measurement, 22.3% of leakage reduction is achieved when compared to the conventional body bias control. Our work also considers the practical on-chip body bias generator and proposed a technique which can be available with the body bias generator.
本文言語 | English |
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ホスト出版物のタイトル | Proceedings for 2017 IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips 2017 |
出版社 | Institute of Electrical and Electronics Engineers Inc. |
ISBN(電子版) | 9781538638286 |
DOI | |
出版ステータス | Published - 2017 6月 12 |
イベント | 20th IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips 2017 - Yokohama, Japan 継続期間: 2017 4月 19 → 2017 4月 21 |
Other
Other | 20th IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips 2017 |
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国/地域 | Japan |
City | Yokohama |
Period | 17/4/19 → 17/4/21 |
ASJC Scopus subject areas
- ハードウェアとアーキテクチャ
- 電子工学および電気工学