Low-latency wireless 3D NoCs via randomized shortcut chips

Hiroki Matsutani, Michihiro Koibuchi, Ikki Fujiwara, Takahiro Kagami, Yasuhiro Take, Tadahiro Kuroda, Paul Bogdan, Radu Marculescu, Hideharu Amano

研究成果: Conference contribution

39 被引用数 (Scopus)


In this paper, we demonstrate that we can reduce the communication latency significantly by inserting a fraction of randomness into a wireless 3D NoC (where CMOS wireless links are used for vertical inter-chip communication) when considering the physical constraints of the 3D design space. Towards this end, we consider two cases, namely 1) replacing existing horizontal 2D links in a wireless 3D NoC with randomized shortcut NoC links and 2) enabling full connectivity by adding a randomized NoC layer to a wireless 3D platform with partial or no horizontal connectivity. Consequently, the packet routing is optimized by exploiting both the existing and the newly added random NoC. At the same time, by adding randomly wired shortcut NoCs to a wireless 3D platform, a good balance can be established between the modularity of the design and the minimum randomness needed to achieve low latency, and experimental results show that by adding a random NoC chip to wireless 3D CMPs without built-in horizontal connectivity, the communication latency can be reduced by as much as 26.2% when compared to adding a 2D mesh NoC. Also, the application execution time and average flit transfer energy can be improved accordingly.

ホスト出版物のタイトルProceedings - Design, Automation and Test in Europe, DATE 2014
出版社Institute of Electrical and Electronics Engineers Inc.
出版ステータスPublished - 2014 1月 1
イベント17th Design, Automation and Test in Europe, DATE 2014 - Dresden, Germany
継続期間: 2014 3月 242014 3月 28


名前Proceedings -Design, Automation and Test in Europe, DATE


Other17th Design, Automation and Test in Europe, DATE 2014

ASJC Scopus subject areas

  • 工学(全般)


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