MAPLE chip: A processing element for a static scheduling centric multiprocessor

K. Yasufuku; R. Ogawa; K. Iwai; Hideharu Amano

doi:10.1109/ASPDAC.2003.1195085

MAPLE chip: A processing element for a static scheduling centric multiprocessor

K. Yasufuku, R. Ogawa, K. Iwai, Hideharu Amano

情報工学科

研究成果: Conference contribution

抄録

A custom processor called MAPLE, which supports static scheduling by automatic parallelizing compilers, is implemented and evaluated. MAPLE has a high performance floating point arithmetic unit and low latency data transfer mechanism for other MAPLE chips. The maximum operational frequency is 80 MHz in simulation, and the operation on the prototype board with 23 MHz clock is confirmed. It requires about 0.56 W at 23 MHz operation.

本文言語	English
ホスト出版物のタイトル	Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
出版社	Institute of Electrical and Electronics Engineers Inc.
ページ	575-576
ページ数	2
巻	2003-January
ISBN（印刷版）	0780376595
DOI	https://doi.org/10.1109/ASPDAC.2003.1195085
出版ステータス	Published - 2003
イベント	Asia and South Pacific Design Automation Conference, ASP-DAC 2003 - Kitakyushu, Japan 継続期間: 2003 1月 21 → 2003 1月 24

Other

Other	Asia and South Pacific Design Automation Conference, ASP-DAC 2003
国/地域	Japan
City	Kitakyushu
Period	03/1/21 → 03/1/24

ASJC Scopus subject areas

電子工学および電気工学
コンピュータサイエンスの応用
コンピュータグラフィックスおよびコンピュータ支援設計

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10.1109/ASPDAC.2003.1195085

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引用スタイル

Yasufuku, K, Ogawa, R, Iwai, K & Amano, H 2003, MAPLE chip: A processing element for a static scheduling centric multiprocessor. in Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC. vol. 2003-January, 1195085, Institute of Electrical and Electronics Engineers Inc., pp. 575-576, Asia and South Pacific Design Automation Conference, ASP-DAC 2003, Kitakyushu, Japan, 03/1/21. https://doi.org/10.1109/ASPDAC.2003.1195085

@inproceedings{3dbf710b370e499e8c706ef9cdac6bb9,

title = "MAPLE chip: A processing element for a static scheduling centric multiprocessor",

abstract = "A custom processor called MAPLE, which supports static scheduling by automatic parallelizing compilers, is implemented and evaluated. MAPLE has a high performance floating point arithmetic unit and low latency data transfer mechanism for other MAPLE chips. The maximum operational frequency is 80 MHz in simulation, and the operation on the prototype board with 23 MHz clock is confirmed. It requires about 0.56 W at 23 MHz operation.",

author = "K. Yasufuku and R. Ogawa and K. Iwai and Hideharu Amano",

year = "2003",

doi = "10.1109/ASPDAC.2003.1195085",

language = "English",

isbn = "0780376595",

volume = "2003-January",

pages = "575--576",

booktitle = "Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "Asia and South Pacific Design Automation Conference, ASP-DAC 2003 ; Conference date: 21-01-2003 Through 24-01-2003",

}

TY - GEN

T1 - MAPLE chip

T2 - Asia and South Pacific Design Automation Conference, ASP-DAC 2003

AU - Yasufuku, K.

AU - Ogawa, R.

AU - Iwai, K.

AU - Amano, Hideharu

PY - 2003

Y1 - 2003

N2 - A custom processor called MAPLE, which supports static scheduling by automatic parallelizing compilers, is implemented and evaluated. MAPLE has a high performance floating point arithmetic unit and low latency data transfer mechanism for other MAPLE chips. The maximum operational frequency is 80 MHz in simulation, and the operation on the prototype board with 23 MHz clock is confirmed. It requires about 0.56 W at 23 MHz operation.

AB - A custom processor called MAPLE, which supports static scheduling by automatic parallelizing compilers, is implemented and evaluated. MAPLE has a high performance floating point arithmetic unit and low latency data transfer mechanism for other MAPLE chips. The maximum operational frequency is 80 MHz in simulation, and the operation on the prototype board with 23 MHz clock is confirmed. It requires about 0.56 W at 23 MHz operation.

UR - http://www.scopus.com/inward/record.url?scp=84954405745&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84954405745&partnerID=8YFLogxK

U2 - 10.1109/ASPDAC.2003.1195085

DO - 10.1109/ASPDAC.2003.1195085

M3 - Conference contribution

AN - SCOPUS:84954405745

SN - 0780376595

VL - 2003-January

SP - 575

EP - 576

BT - Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

PB - Institute of Electrical and Electronics Engineers Inc.

Y2 - 21 January 2003 through 24 January 2003

ER -

MAPLE chip: A processing element for a static scheduling centric multiprocessor

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ASJC Scopus subject areas

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