Namacha: A software development environment for a multi-chip convolutional network accelerator

Tetsui Ohkubo, Ryo Takata, Ryuichi Sakamoto, Masaaki Kondo, Hideharu Amano

研究成果: Conference contribution

1 被引用数 (Scopus)

抄録

A building block convolutional neural network accelerator consists of a host and multiple accelerator chips which can scale the performance by changing the number of stacked chips. In order to program the host and the accelerators, an integrated programming development environment called NAMACHA is proposed. It includes compilers for convolutional neural network accelerators and a system level simulator including inter-chip communication latency. On the simulator, the total application runs 4390x faster than that of the logic level simulation with 1.27% difference of clock cycle counts.

本文言語English
ホスト出版物のタイトルProceedings of the 32nd International Conference on Computers and Their Applications, CATA 2017
出版社The International Society for Computers and Their Applications (ISCA)
ページ101-106
ページ数6
ISBN(電子版)9781943436064
出版ステータスPublished - 2017
イベント32nd International Conference on Computers and Their Applications, CATA 2017 - Honolulu, United States
継続期間: 2017 3月 202017 3月 22

Other

Other32nd International Conference on Computers and Their Applications, CATA 2017
国/地域United States
CityHonolulu
Period17/3/2017/3/22

ASJC Scopus subject areas

  • コンピュータ サイエンスの応用

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