Near-optimal parallel algorithm for one-dimensional gate assignment in VLSI layout

K. Tsuchiya, Y. Takefuji

研究成果: Article査読

1 被引用数 (Scopus)

抄録

A novel approach to the one-dimensional gate assignment problem is presented in this paper where the problem is NP-hard and one of the most fundamental layout problems in VLSI design. The proposed system is composed of n×n processing elements called the artificial two-dimensional maximum neurons for (n+2)-gate assignment problems. We have discovered the improved solutions in the benchmark problems over the best existing algorithms. The proposed parallel algorithm is also applicable to other VLSI layout problems.

本文言語English
ページ(範囲)249-257
ページ数9
ジャーナルIntegrated Computer-Aided Engineering
6
3
DOI
出版ステータスPublished - 1999

ASJC Scopus subject areas

  • ソフトウェア
  • 理論的コンピュータサイエンス
  • コンピュータ サイエンスの応用
  • 計算理論と計算数学
  • 人工知能

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