Non-volatile doubly stacked Si dot memory

R. Ohba, N. Sugiyama, Ken Uchida, J. Koga, S. Fujita, A. Toriumi

研究成果: Conference contribution

抄録

In the Si dot memory, the realization of a long retention time is the most critical issue, since the tunnel oxide is very thin. So as to realize a long retention time without losing high-speed w/e in Si dot memory, we propose a novel Si dot memory whose floating gates are doubly stacked Si dots. A long retention time is possible, since the charge leak between the upper dots and the channel is suppressed due to quantum confinement and Coulomb blockade in the lower dot. Simultaneously, a high-speed w/e is possible, since the leak suppression is useful only in a low voltage region. Therefore, Si double dot memory is very promising for low-power non-volatile memory.

本文言語English
ホスト出版物のタイトル2002 International Microprocesses and Nanotechnology Conference, MNC 2002
出版社Institute of Electrical and Electronics Engineers Inc.
ページ56-57
ページ数2
ISBN(印刷版)4891140313, 9784891140311
DOI
出版ステータスPublished - 2002
外部発表はい
イベントInternational Microprocesses and Nanotechnology Conference, MNC 2002 - Tokyo, Japan
継続期間: 2002 11 62002 11 8

Other

OtherInternational Microprocesses and Nanotechnology Conference, MNC 2002
国/地域Japan
CityTokyo
Period02/11/602/11/8

ASJC Scopus subject areas

  • ハードウェアとアーキテクチャ
  • 電子工学および電気工学

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