It is essential to control VDD and VTH for low-power, high-speed CMOS design. In this paper, it is shown that these two parameters can be controlled by designers as objectives of design optimization to find better trade-offs between power and speed. Quantitative analysis of trade-offs between power and speed is presented. Some of the popular circuit techniques and design examples to control VDD and VTH are introduced. A simple theory to compute optimum multiple VDD's and VTH's is described. Scaling scenarios of variable and/or multiple VDD's and VTH's is discussed to show future technology directions.
|ジャーナル||IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers|
|出版ステータス||Published - 2002 12 1|
|イベント||IEEE/ACM International Conference on Computer Aided Design (ICCAD) - San Jose, CA, United States|
継続期間: 2002 11 10 → 2002 11 14
ASJC Scopus subject areas
- Computer Science Applications
- Computer Graphics and Computer-Aided Design