Optimization and control of VDD and VTH for low-power, high-speed CMOS design

Tadahiro Kuroda

研究成果: Conference article査読

14 被引用数 (Scopus)

抄録

It is essential to control VDD and VTH for low-power, high-speed CMOS design. In this paper, it is shown that these two parameters can be controlled by designers as objectives of design optimization to find better trade-offs between power and speed. Quantitative analysis of trade-offs between power and speed is presented. Some of the popular circuit techniques and design examples to control VDD and VTH are introduced. A simple theory to compute optimum multiple VDD's and VTH's is described. Scaling scenarios of variable and/or multiple VDD's and VTH's is discussed to show future technology directions.

本文言語English
ページ(範囲)28-34
ページ数7
ジャーナルIEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers
DOI
出版ステータスPublished - 2002
外部発表はい
イベントIEEE/ACM International Conference on Computer Aided Design (ICCAD) - San Jose, CA, United States
継続期間: 2002 11月 102002 11月 14

ASJC Scopus subject areas

  • ソフトウェア
  • コンピュータ サイエンスの応用
  • コンピュータ グラフィックスおよびコンピュータ支援設計

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