Optimization and control of VDD and VTH for low-power, high-speed CMOS design

Tadahiro Kuroda

    研究成果: Conference article査読

    14 被引用数 (Scopus)

    抄録

    It is essential to control VDD and VTH for low-power, high-speed CMOS design. In this paper, it is shown that these two parameters can be controlled by designers as objectives of design optimization to find better trade-offs between power and speed. Quantitative analysis of trade-offs between power and speed is presented. Some of the popular circuit techniques and design examples to control VDD and VTH are introduced. A simple theory to compute optimum multiple VDD's and VTH's is described. Scaling scenarios of variable and/or multiple VDD's and VTH's is discussed to show future technology directions.

    本文言語English
    ページ(範囲)28-34
    ページ数7
    ジャーナルIEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers
    DOI
    出版ステータスPublished - 2002 12 1
    イベントIEEE/ACM International Conference on Computer Aided Design (ICCAD) - San Jose, CA, United States
    継続期間: 2002 11 102002 11 14

    ASJC Scopus subject areas

    • Software
    • Computer Science Applications
    • Computer Graphics and Computer-Aided Design

    フィンガープリント 「Optimization and control of V<sub>DD</sub> and V<sub>TH</sub> for low-power, high-speed CMOS design」の研究トピックを掘り下げます。これらがまとまってユニークなフィンガープリントを構成します。

    引用スタイル