Overview of the JUMP-1, an MPP prototype for general-purpose parallel computations

Kei Hiraki; Hideharu Amano; Morihiro Kuga; Toshinori Sueyoshi; Tomohiro Kudoh; Hiroshi Nakashima; Hironori Nakajo; Hideo Matsuda; Takashi Matsumoto; Shin ichiro Mori

Overview of the JUMP-1, an MPP prototype for general-purpose parallel computations

Kei Hiraki, Hideharu Amano, Morihiro Kuga, Toshinori Sueyoshi, Tomohiro Kudoh, Hiroshi Nakashima, Hironori Nakajo, Hideo Matsuda, Takashi Matsumoto, Shin ichiro Mori

研究成果: Paper › 査読

10 被引用数 (Scopus)

抄録

We describe the basic architecture of JUMP-1, an MPP prototype developed by collaboration between 7 universities. The proposed architecture can exploit high performance of coarse-grained RISC processor performance in connection with flexible fine-grained operation such as distributed shared memory, versatile synchronization and message communications.

本文言語	English
ページ	427-434
ページ数	8
出版ステータス	Published - 1994 12月 1
外部発表	はい
イベント	Proceedings of the International Symposium on Parallel Architectures, Algorithms and Networks (ISPAN) - Kanazawa, Jpn 継続期間: 1994 12月 14 → 1994 12月 16

Other

Other	Proceedings of the International Symposium on Parallel Architectures, Algorithms and Networks (ISPAN)
City	Kanazawa, Jpn
Period	94/12/14 → 94/12/16

ASJC Scopus subject areas

コンピュータサイエンス（全般）

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引用スタイル

Hiraki, K, Amano, H, Kuga, M, Sueyoshi, T, Kudoh, T, Nakashima, H, Nakajo, H, Matsuda, H, Matsumoto, T & Mori, SI 1994, 'Overview of the JUMP-1, an MPP prototype for general-purpose parallel computations', Paper presented at Proceedings of the International Symposium on Parallel Architectures, Algorithms and Networks (ISPAN), Kanazawa, Jpn, 94/12/14 - 94/12/16 pp. 427-434.

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author = "Kei Hiraki and Hideharu Amano and Morihiro Kuga and Toshinori Sueyoshi and Tomohiro Kudoh and Hiroshi Nakashima and Hironori Nakajo and Hideo Matsuda and Takashi Matsumoto and Mori, {Shin ichiro}",

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AU - Hiraki, Kei

AU - Amano, Hideharu

AU - Kuga, Morihiro

AU - Sueyoshi, Toshinori

AU - Kudoh, Tomohiro

AU - Nakashima, Hiroshi

AU - Nakajo, Hironori

AU - Matsuda, Hideo

AU - Matsumoto, Takashi

AU - Mori, Shin ichiro

PY - 1994/12/1

Y1 - 1994/12/1

N2 - We describe the basic architecture of JUMP-1, an MPP prototype developed by collaboration between 7 universities. The proposed architecture can exploit high performance of coarse-grained RISC processor performance in connection with flexible fine-grained operation such as distributed shared memory, versatile synchronization and message communications.

AB - We describe the basic architecture of JUMP-1, an MPP prototype developed by collaboration between 7 universities. The proposed architecture can exploit high performance of coarse-grained RISC processor performance in connection with flexible fine-grained operation such as distributed shared memory, versatile synchronization and message communications.

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T2 - Proceedings of the International Symposium on Parallel Architectures, Algorithms and Networks (ISPAN)

Y2 - 14 December 1994 through 16 December 1994

ER -

Overview of the JUMP-1, an MPP prototype for general-purpose parallel computations

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