抄録
We describe the basic architecture of JUMP-1, an MPP prototype developed by collaboration between 7 universities. The proposed architecture can exploit high performance of coarse-grained RISC processor performance in connection with flexible fine-grained operation such as distributed shared memory, versatile synchronization and message communications.
本文言語 | English |
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ページ | 427-434 |
ページ数 | 8 |
出版ステータス | Published - 1994 12月 1 |
外部発表 | はい |
イベント | Proceedings of the International Symposium on Parallel Architectures, Algorithms and Networks (ISPAN) - Kanazawa, Jpn 継続期間: 1994 12月 14 → 1994 12月 16 |
Other
Other | Proceedings of the International Symposium on Parallel Architectures, Algorithms and Networks (ISPAN) |
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City | Kanazawa, Jpn |
Period | 94/12/14 → 94/12/16 |
ASJC Scopus subject areas
- コンピュータ サイエンス(全般)