TY - JOUR

T1 - Packing directed circuits through prescribed vertices bounded fractionally

AU - Kakimura, Naonori

AU - Kawarabayashi, Ken Ichi

N1 - Copyright:
Copyright 2012 Elsevier B.V., All rights reserved.

PY - 2012

Y1 - 2012

N2 - A seminal result of Reed et al. [Combinatorica, 16 (1996), pp. 535-554] says that a directed graph has either κ vertex-disjoint directed circuits or a set of at most f(κ) vertices meeting all directed circuits. This paper aims at generalizing their result to packing directed circuits through a prescribed set S of vertices. Such a circuit is called an S-circuit. Even et al. [Algorithmica, 20 (1998), pp. 151-174] showed a fractional version of packing S-circuits. In this paper, we show that the fractionality can be bounded by at most one-fifth: Given an integer κ and a vertex subset S, whose size may not depend on κ, we prove that either G has a 1/5-integral packing of k disjoint S-circuits, i.e., each vertex appears in at most five of these S-circuits, or G has a vertex set X of order at most f(k) (for some function f of κ) such that G - X has no such circuit. We also give a fixed-parameter tractable approximation algorithm for finding a 1/5-integral packing of S-circuits. This algorithm finds a 1/5-integral packing of size approximately κ in polynomial time if it has a 1/5-integral packing of size k for a given directed graph and an integer κ.

AB - A seminal result of Reed et al. [Combinatorica, 16 (1996), pp. 535-554] says that a directed graph has either κ vertex-disjoint directed circuits or a set of at most f(κ) vertices meeting all directed circuits. This paper aims at generalizing their result to packing directed circuits through a prescribed set S of vertices. Such a circuit is called an S-circuit. Even et al. [Algorithmica, 20 (1998), pp. 151-174] showed a fractional version of packing S-circuits. In this paper, we show that the fractionality can be bounded by at most one-fifth: Given an integer κ and a vertex subset S, whose size may not depend on κ, we prove that either G has a 1/5-integral packing of k disjoint S-circuits, i.e., each vertex appears in at most five of these S-circuits, or G has a vertex set X of order at most f(k) (for some function f of κ) such that G - X has no such circuit. We also give a fixed-parameter tractable approximation algorithm for finding a 1/5-integral packing of S-circuits. This algorithm finds a 1/5-integral packing of size approximately κ in polynomial time if it has a 1/5-integral packing of size k for a given directed graph and an integer κ.

KW - Disjoint circuits

KW - FPT approximability

KW - Feedback vertex sets

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U2 - 10.1137/100786423

DO - 10.1137/100786423

M3 - Article

AN - SCOPUS:84867307956

VL - 26

SP - 1121

EP - 1133

JO - SIAM Journal on Discrete Mathematics

JF - SIAM Journal on Discrete Mathematics

SN - 0895-4801

IS - 3

ER -