### 抄録

An n-bit parallel binary adder consisting of NOR gates only in single-rail input logic is proved to require at least 17n plus 1 connections for any value of n. Such an adder is proved to require at least 7n plus 2 gates. An adder that attains these minimal values is shown. Also, it is concluded that some of the parallel adders with the minimum number of NOR gates derived by H. C. Lai and S. Muroga have the minimum number of connections as well as the minimum number of gates, except for the two modules for the two least significant bit positions. In general, it is extremely difficult to prove the minimality of the number of gates in an arbitrarily large logic network, and it is even more difficult to prove the minimality of the number of connections. Both problems have been solved for n-bit adders of NOR gates in single-rail input logic.

元の言語 | English |
---|---|

ページ（範囲） | 969-976 |

ページ数 | 8 |

ジャーナル | IEEE Transactions on Computers |

巻 | C-32 |

発行部数 | 10 |

出版物ステータス | Published - 1983 10 |

外部発表 | Yes |

### Fingerprint

### ASJC Scopus subject areas

- Hardware and Architecture
- Electrical and Electronic Engineering

### これを引用

*IEEE Transactions on Computers*,

*C-32*(10), 969-976.

**PARALLEL BINARY ADDERS WITH A MINIMUM NUMBER OF CONNECTIONS.** / Sakurai, Akito; Muroga, Saburo.

研究成果: Article

*IEEE Transactions on Computers*, 巻. C-32, 番号 10, pp. 969-976.

}

TY - JOUR

T1 - PARALLEL BINARY ADDERS WITH A MINIMUM NUMBER OF CONNECTIONS.

AU - Sakurai, Akito

AU - Muroga, Saburo

PY - 1983/10

Y1 - 1983/10

N2 - An n-bit parallel binary adder consisting of NOR gates only in single-rail input logic is proved to require at least 17n plus 1 connections for any value of n. Such an adder is proved to require at least 7n plus 2 gates. An adder that attains these minimal values is shown. Also, it is concluded that some of the parallel adders with the minimum number of NOR gates derived by H. C. Lai and S. Muroga have the minimum number of connections as well as the minimum number of gates, except for the two modules for the two least significant bit positions. In general, it is extremely difficult to prove the minimality of the number of gates in an arbitrarily large logic network, and it is even more difficult to prove the minimality of the number of connections. Both problems have been solved for n-bit adders of NOR gates in single-rail input logic.

AB - An n-bit parallel binary adder consisting of NOR gates only in single-rail input logic is proved to require at least 17n plus 1 connections for any value of n. Such an adder is proved to require at least 7n plus 2 gates. An adder that attains these minimal values is shown. Also, it is concluded that some of the parallel adders with the minimum number of NOR gates derived by H. C. Lai and S. Muroga have the minimum number of connections as well as the minimum number of gates, except for the two modules for the two least significant bit positions. In general, it is extremely difficult to prove the minimality of the number of gates in an arbitrarily large logic network, and it is even more difficult to prove the minimality of the number of connections. Both problems have been solved for n-bit adders of NOR gates in single-rail input logic.

UR - http://www.scopus.com/inward/record.url?scp=0020831145&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0020831145&partnerID=8YFLogxK

M3 - Article

AN - SCOPUS:0020831145

VL - C-32

SP - 969

EP - 976

JO - IEEE Transactions on Computers

JF - IEEE Transactions on Computers

SN - 0018-9340

IS - 10

ER -