抄録
ClearSpeed's CSX600 that consists of 96 Processing Elements (PEs) employs a one-dimensional array topology for a simple SIMD processing. To clearly show the performance factors and practical issues of NoCs in an existing modern many-core SIMD system, this paper measures and analyzes NoCs of CSX600 called Swazzle and ClearConnect. Evaluation and analysis results show that the sending and receiving overheads are the major limitation factors to the effective network bandwidth. We found that (1) the number of used PEs, (2) the size of transferred data, and (3) data alignment of a shared memory are three main points to make the best use of bandwidth. In addition, we estimated the best- and worst-case latencies of data transfers in parallel applications.
| 元の言語 | English |
|---|---|
| ホスト出版物のタイトル | Proceedings - 2009 IEEE International Symposium on Parallel and Distributed Processing with Applications, ISPA 2009 |
| ページ | 203-210 |
| ページ数 | 8 |
| DOI | |
| 出版物ステータス | Published - 2009 |
| イベント | 2009 IEEE International Symposium on Parallel and Distributed Processing with Applications, ISPA 2009 - Chengdu, Sichuan, China 継続期間: 2009 8 9 → 2009 8 12 |
Other
| Other | 2009 IEEE International Symposium on Parallel and Distributed Processing with Applications, ISPA 2009 |
|---|---|
| 国 | China |
| 市 | Chengdu, Sichuan |
| 期間 | 09/8/9 → 09/8/12 |
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ASJC Scopus subject areas
- Computer Science Applications
- Software
これを引用
Performance analysis of clearspeed's CSX600 interconnects. / Nishikawa, Yuri; Koibuchi, Michihiro; Yoshimi, Masato; Shitara, Akihiro; Miura, Kenichi; Amano, Hideharu.
Proceedings - 2009 IEEE International Symposium on Parallel and Distributed Processing with Applications, ISPA 2009. 2009. p. 203-210 5207934.研究成果: Conference contribution
}
TY - GEN
T1 - Performance analysis of clearspeed's CSX600 interconnects
AU - Nishikawa, Yuri
AU - Koibuchi, Michihiro
AU - Yoshimi, Masato
AU - Shitara, Akihiro
AU - Miura, Kenichi
AU - Amano, Hideharu
PY - 2009
Y1 - 2009
N2 - ClearSpeed's CSX600 that consists of 96 Processing Elements (PEs) employs a one-dimensional array topology for a simple SIMD processing. To clearly show the performance factors and practical issues of NoCs in an existing modern many-core SIMD system, this paper measures and analyzes NoCs of CSX600 called Swazzle and ClearConnect. Evaluation and analysis results show that the sending and receiving overheads are the major limitation factors to the effective network bandwidth. We found that (1) the number of used PEs, (2) the size of transferred data, and (3) data alignment of a shared memory are three main points to make the best use of bandwidth. In addition, we estimated the best- and worst-case latencies of data transfers in parallel applications.
AB - ClearSpeed's CSX600 that consists of 96 Processing Elements (PEs) employs a one-dimensional array topology for a simple SIMD processing. To clearly show the performance factors and practical issues of NoCs in an existing modern many-core SIMD system, this paper measures and analyzes NoCs of CSX600 called Swazzle and ClearConnect. Evaluation and analysis results show that the sending and receiving overheads are the major limitation factors to the effective network bandwidth. We found that (1) the number of used PEs, (2) the size of transferred data, and (3) data alignment of a shared memory are three main points to make the best use of bandwidth. In addition, we estimated the best- and worst-case latencies of data transfers in parallel applications.
UR - http://www.scopus.com/inward/record.url?scp=70449466935&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=70449466935&partnerID=8YFLogxK
U2 - 10.1109/ISPA.2009.102
DO - 10.1109/ISPA.2009.102
M3 - Conference contribution
AN - SCOPUS:70449466935
SN - 9780769537474
SP - 203
EP - 210
BT - Proceedings - 2009 IEEE International Symposium on Parallel and Distributed Processing with Applications, ISPA 2009
ER -