The virtual hardware has proposed to realize a large digital circuit with a small real hardware by using an extented Field Programmable Gate Array(FPGA). Several configuration RAM modules are provided inside the FPGA chip, and the configuration of the gate array can be rapidly changed by replacing the active module. Configuration data is transferred to an unused configuration RAM module from an off-chip backup RAM. A novel computation mechanism(WASMII), which executes a target dataflow graph directly, is proposed based on the virtual hardware. A WASMII chip consists of the expended FPGA on virtual hardware and the additional mechanism to replace configuration RAM modules in the data driven manner. Configuration data is preloaded by the order which is assigned in advance with a static scheduling. By connecting a number of WASMII chips, a highly parallel system can be easily constructed.