Planar non-volatile memory with single-electron channel fabricated on a hyper-thin SOI film

K. Uchida, J. Koga, R. Ohba, S. Takagi, A. Toriumi

    研究成果: Paper査読

    2 被引用数 (Scopus)

    抄録

    A hyper-thin SOI memory device that has both conduction channel and storage islands at the lower gate voltage is demonstrated. It shows both Coulomb staircase and oscillations at 20 K. By using coexistence of memory with Coulomb blockade effects, the Coulomb oscillation phase is well controlled. This will open a way to the robust nano-structure devices, including the functional devices for multi-value memory/logic.

    本文言語English
    ページ138-139
    ページ数2
    出版ステータスPublished - 1999 12月 1
    イベントProceedings of the 1999 57th Annual Device Research Conference Digest (DRC) - Santa Barbara, CA, USA
    継続期間: 1999 6月 281999 6月 30

    Other

    OtherProceedings of the 1999 57th Annual Device Research Conference Digest (DRC)
    CitySanta Barbara, CA, USA
    Period99/6/2899/6/30

    ASJC Scopus subject areas

    • 工学(全般)

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