Power Optimization Considering the Chip Temperature of Low Power Reconfigurable Accelerator CMA-SOTB

Yu Fujita, Hyate Okuhara, Koichiro Masuyama, Hideharu Amano

研究成果: Conference contribution

3 引用 (Scopus)

抄録

For low power yet high performance processing in battery driven devices, a coarse grained reconfigurable accelerator called Cool Mega Array (CMA)-SOTB is implemented by using Silicon on Thin BOX (SOTB), a new process technology developed by the Low-power Electronics Association & Project (LEAP). This chip has three voltages for controlling power and performance, supply voltage, PE-Array body bias voltage and microcontroller body bias voltage. In order to find the optimal operational point for a given requirement, a large effort for measurements and adjustments is required. This paper proposes power model for finding the optimal operation point from several measurement results. From the proposed model, the power can be estimated with 4.4% difference from the measured value on average. By using the model, the optimal source voltage and body bias voltages for PE-Array and microcontroller can be obtained for a given operational frequency. Compared with the result of the exhaustive search, 37.4% of energy is saved with much small effort of measurements.

元の言語English
ホスト出版物のタイトルProceedings - 2015 3rd International Symposium on Computing and Networking, CANDAR 2015
出版者Institute of Electrical and Electronics Engineers Inc.
ページ21-29
ページ数9
ISBN(印刷物)9781467397971
DOI
出版物ステータスPublished - 2016 3 2
イベント3rd International Symposium on Computing and Networking, CANDAR 2015 - Sapporo, Hokkaido, Japan
継続期間: 2015 12 82015 12 11

Other

Other3rd International Symposium on Computing and Networking, CANDAR 2015
Japan
Sapporo, Hokkaido
期間15/12/815/12/11

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Bias voltage
Particle accelerators
Microcontrollers
Silicon
Electric potential
Low power electronics
Temperature
Processing

ASJC Scopus subject areas

  • Computer Science Applications
  • Computational Theory and Mathematics
  • Computer Networks and Communications

これを引用

Fujita, Y., Okuhara, H., Masuyama, K., & Amano, H. (2016). Power Optimization Considering the Chip Temperature of Low Power Reconfigurable Accelerator CMA-SOTB. : Proceedings - 2015 3rd International Symposium on Computing and Networking, CANDAR 2015 (pp. 21-29). [7424265] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/CANDAR.2015.19

Power Optimization Considering the Chip Temperature of Low Power Reconfigurable Accelerator CMA-SOTB. / Fujita, Yu; Okuhara, Hyate; Masuyama, Koichiro; Amano, Hideharu.

Proceedings - 2015 3rd International Symposium on Computing and Networking, CANDAR 2015. Institute of Electrical and Electronics Engineers Inc., 2016. p. 21-29 7424265.

研究成果: Conference contribution

Fujita, Y, Okuhara, H, Masuyama, K & Amano, H 2016, Power Optimization Considering the Chip Temperature of Low Power Reconfigurable Accelerator CMA-SOTB. : Proceedings - 2015 3rd International Symposium on Computing and Networking, CANDAR 2015., 7424265, Institute of Electrical and Electronics Engineers Inc., pp. 21-29, 3rd International Symposium on Computing and Networking, CANDAR 2015, Sapporo, Hokkaido, Japan, 15/12/8. https://doi.org/10.1109/CANDAR.2015.19
Fujita Y, Okuhara H, Masuyama K, Amano H. Power Optimization Considering the Chip Temperature of Low Power Reconfigurable Accelerator CMA-SOTB. : Proceedings - 2015 3rd International Symposium on Computing and Networking, CANDAR 2015. Institute of Electrical and Electronics Engineers Inc. 2016. p. 21-29. 7424265 https://doi.org/10.1109/CANDAR.2015.19
Fujita, Yu ; Okuhara, Hyate ; Masuyama, Koichiro ; Amano, Hideharu. / Power Optimization Considering the Chip Temperature of Low Power Reconfigurable Accelerator CMA-SOTB. Proceedings - 2015 3rd International Symposium on Computing and Networking, CANDAR 2015. Institute of Electrical and Electronics Engineers Inc., 2016. pp. 21-29
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