Proximity inter-chip communication

Tadahiro Kuroda

    研究成果: Conference contribution

    1 被引用数 (Scopus)

    抄録

    A 1Tb/s 3W inter-chip transceiver transmits clock and data by inductive coupling at a clock rate of 1GHz and data rate of 1Gb/s per channel. 1024 data transceivers are arranged with a pitch of 30μm. The total layout area is 2mm2 in 0.18μm. CMOS and the chip thickness is 10μm. 4-phase TDMA reduces crosstalk and the BER is <10-12. Bi-phase modulation is used to improve noise immunity, reducing power in the transceiver.

    本文言語English
    ホスト出版物のタイトルICSICT-2006
    ホスト出版物のサブタイトル2006 8th International Conference on Solid-State and Integrated Circuit Technology, Proceedings
    出版社IEEE Computer Society
    ページ1841-1844
    ページ数4
    ISBN(印刷版)1424401615, 9781424401611
    DOI
    出版ステータスPublished - 2006 1 1
    イベントICSICT-2006: 2006 8th International Conference on Solid-State and Integrated Circuit Technology - Shanghai, China
    継続期間: 2006 10 232006 10 26

    出版物シリーズ

    名前ICSICT-2006: 2006 8th International Conference on Solid-State and Integrated Circuit Technology, Proceedings

    Other

    OtherICSICT-2006: 2006 8th International Conference on Solid-State and Integrated Circuit Technology
    CountryChina
    CityShanghai
    Period06/10/2306/10/26

    ASJC Scopus subject areas

    • Electrical and Electronic Engineering

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