pSAS/c: Pseudo Set Associative and Shared with Competitive Cache

Keisuke Inoue, Hideharu Amano

研究成果: Article査読

抄録

Today, low-cost, high-performance processors are required in many products such as portable terminals and network appliances, and the demand for on-chip multiprocessors is increasing. The authors have proposed a semi-shared pseudo set associative cache for on-chip multiprocessors, or pSAS, which offers both high speed of the snoop cache and on-chip cache memory efficiency of the shared cache. Although pSAS can directly access other caches with some delay, its performance deteriorates if it continues to access other caches. In this article, we propose the pSAS/c cache that solves this problem by copying frequently accessed data into self-cache and accessing it as fast as the snoop cache.

本文言語English
ページ(範囲)76-84
ページ数9
ジャーナルElectronics and Communications in Japan, Part II: Electronics (English translation of Denshi Tsushin Gakkai Ronbunshi)
86
9
DOI
出版ステータスPublished - 2003 9月

ASJC Scopus subject areas

  • 物理学および天文学(全般)
  • コンピュータ ネットワークおよび通信
  • 電子工学および電気工学

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