Reduced path viterbi decoder with inverse circuit of the encoder

A reduced path Viterbi decoder with inverwe circuit of the encoder is proposed. The proposed system consists of the pre-decoder and reduced path Viterbi decoder. The pre-decoder separates the mixed channel noise from the received sequence. The number of errors in the pre-decoded error sequence is counted and the path reduction is implemented by the number of errors in pre-decoded error sequence. The path reduction is implemented as a function of channel condition because the errors in the pre-decoded error sequence can be considered as the channel error sequence. Due to the reduction of the path, the number of ACS (add compare select) operations can be reduced, which occupies the dominant part in Viterbi decoding. The ACS reduction ratio for the proposed system achieves up to 30% for the case of (2,1,2) Ungerboeck code without degradation of the error performance.