Reducing power consumption for dynamically reconfigurable processor array with partially fixed configuration mapping

Kazuei Hironaka, Masayuki Kimura, Yoshiki Saito, Toru Sano, Masaru Kato, Vasutan Tunbunheng, Yoshihiro Yasuda, Hideharu Amano

研究成果: Conference contribution

1 被引用数 (Scopus)

抄録

The Partially Fixed Configuration Mapping (PFCM) is a context mapping technique for Dynamically Reconfigurable Processor Array (DRPA) focusing on reducing the power consumption. It assigns operations into Processing Elements (PEs) so as to keep the configuration of the previous context as possible. It reduces the changing part of the datapath structure on the PE array as well as its switching frequency. Preliminary evaluation results show that it can reduce the computing power by 6.7% - 11.3%. The demonstration shows the power reduction directly by using the real chip MuCCRA-3, a prototype of DRPA executing signal processing applications with and without applying PFCM. The design environment for using PFCM is also exhibited.

本文言語English
ホスト出版物のタイトルProceedings - 2010 International Conference on Field-Programmable Technology, FPT'10
ページ349-352
ページ数4
DOI
出版ステータスPublished - 2010 12月 1
イベント2010 International Conference on Field-Programmable Technology, FPT'10 - Beijing, China
継続期間: 2010 12月 82010 12月 10

出版物シリーズ

名前Proceedings - 2010 International Conference on Field-Programmable Technology, FPT'10

Other

Other2010 International Conference on Field-Programmable Technology, FPT'10
国/地域China
CityBeijing
Period10/12/810/12/10

ASJC Scopus subject areas

  • 計算理論と計算数学
  • コンピュータ サイエンスの応用

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