TY - JOUR
T1 - Resistive switching characteristics of interfacial phase-change memory at elevated temperature
AU - Mitrofanov, Kirill V.
AU - Saito, Yuta
AU - Miyata, Noriyuki
AU - Fons, Paul
AU - Kolobov, Alexander V.
AU - Tominaga, Junji
N1 - Funding Information:
This work was supported by JST-CREST (JPMJCR14F1). A part of this study was supported by the NIMS Nano-fabrication Platform in the Nanotechnology Platform Project sponsored by the Ministry of Education, Culture, Sports, Science and Technology, Japan (MEXT).
Publisher Copyright:
© 2018 The Japan Society of Applied Physics.
PY - 2018/4
Y1 - 2018/4
N2 - Interfacial phase-change memory (iPCM) devices were fabricated using W and TiN for the bottom and top contacts, respectively, and the effect of operation temperature on the resistive switching was examined over the range between room temperature and 200 °C. It was found that the highresistance (RESET) state in an iPCM device drops sharply at around 150°C to a low-resistance (SET) state, which differs by ∼400Ω from the SET state obtained by electric-field-induced switching. The iPCM device SET state resistance recovered during the cooling process and remained at nearly the same value for the RESET state. These resistance characteristics greatly differ from those of the conventional Ge-Sb-Te (GST) alloy phase-change memory device, underscoring the fundamentally different switching nature of iPCM devices. From the thermal stability measurements of iPCM devices, their optimal temperature operation was concluded to be less than 100 °C.
AB - Interfacial phase-change memory (iPCM) devices were fabricated using W and TiN for the bottom and top contacts, respectively, and the effect of operation temperature on the resistive switching was examined over the range between room temperature and 200 °C. It was found that the highresistance (RESET) state in an iPCM device drops sharply at around 150°C to a low-resistance (SET) state, which differs by ∼400Ω from the SET state obtained by electric-field-induced switching. The iPCM device SET state resistance recovered during the cooling process and remained at nearly the same value for the RESET state. These resistance characteristics greatly differ from those of the conventional Ge-Sb-Te (GST) alloy phase-change memory device, underscoring the fundamentally different switching nature of iPCM devices. From the thermal stability measurements of iPCM devices, their optimal temperature operation was concluded to be less than 100 °C.
UR - http://www.scopus.com/inward/record.url?scp=85044454525&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85044454525&partnerID=8YFLogxK
U2 - 10.7567/JJAP.57.04FE06
DO - 10.7567/JJAP.57.04FE06
M3 - Article
AN - SCOPUS:85044454525
SN - 0021-4922
VL - 57
JO - Japanese Journal of Applied Physics, Part 1: Regular Papers & Short Notes
JF - Japanese Journal of Applied Physics, Part 1: Regular Papers & Short Notes
IS - 4
M1 - 04FE06
ER -