抄録
Processor performance has been improved due to clock acceleration and ILP extraction techniques. Performance of main memory, however, has not been improved so much. The performance gap between processor and memory will be growing further in the future. This is very serious problem in high performance computing because effective performance is limited by memory ability in most cases. In order to overcome this problem, we propose a new VLSI architecture called SCIMA which integrates software controllable memory into a processor chip. Most of data access is regular in high performance computing. The software controllable memory is more suitable for making good use of the regularity than conventional cache. This paper presents its architecture and performance evaluation. The evaluation results reveal the superiority of SCIMA compared with conventional cache-based architecture.
本文言語 | English |
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ページ | 105-111 |
ページ数 | 7 |
出版ステータス | Published - 2000 |
外部発表 | はい |
イベント | 2000 International Conference on Computer Design - Austin, TX, USA 継続期間: 2000 9月 17 → 2000 9月 20 |
Conference
Conference | 2000 International Conference on Computer Design |
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City | Austin, TX, USA |
Period | 00/9/17 → 00/9/20 |
ASJC Scopus subject areas
- ハードウェアとアーキテクチャ
- 電子工学および電気工学