Shared vs. Snoop: Evaluation of cache structure for single-chip multiprocessors

Toru Kisuki, Masaki Wakabayashi, Junji Yamamoto, Keisuke Inoue, Hideharu Amano

研究成果: Conference contribution

3 被引用数 (Scopus)

抄録

The shared cache structures and snoop cache structures for single-chip multiprocessors are evaluated and compared using an instruction level simulator. Simulation results show that 1-port large shared cache achieves the best performance if there is no delay penalty for arbitration and accessing the bus. However, if 1-clock delay is assumed for accessing the shared cache, a snoop cache with internal wide bus and invalidate style NewKeio protocol overcomes shared caches.

本文言語English
ホスト出版物のタイトルEuro-Par 1997 Parallel Processing - Third International Conference, Proceedings
出版社Springer Verlag
ページ793-797
ページ数5
ISBN(印刷版)9783540634409
DOI
出版ステータスPublished - 1997
イベント3rd International Conference on Parallel Processing, Euro-Par 1997 - Passau, Germany
継続期間: 1997 8 261997 8 29

出版物シリーズ

名前Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
1300 LNCS
ISSN(印刷版)0302-9743
ISSN(電子版)1611-3349

Other

Other3rd International Conference on Parallel Processing, Euro-Par 1997
CountryGermany
CityPassau
Period97/8/2697/8/29

ASJC Scopus subject areas

  • Theoretical Computer Science
  • Computer Science(all)

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