A data driven computer WASMII which exploits dynamically reconfigurable FPGAs based on a virtual haxdwaxe has been developed. This paper presents a software system which automatically generates a configuration data for FPGAs used in the WASMII. In this system, an application program is edited as a dataflow graph with a user interface, and divided into a set of subgraphs each of them is corresponding to the configuration data of an FPGA chip. These subgraphs axe translated into program modules described in a hardware description language called the SFL. From the SFL programs, a logic synthesis tool PARTHENON generates a net-list of logic circuits for the subgraphs. Finally, the net-list is translated again for the Xilinx’s CAD system: and the configuration data is generated. Here, the ordinary differential equation solver is presented as an example, and the number of gates is evaluated.