Solution for high-performance Schottky-source/drain MOSFETs: Schottky barrier height engineering with dopant segregation technique

A. Kinoshita; Y. Tsuchiya; A. Yagishita; K. Uchida; J. Koga

Solution for high-performance Schottky-source/drain MOSFETs: Schottky barrier height engineering with dopant segregation technique

A. Kinoshita, Y. Tsuchiya, A. Yagishita, K. Uchida, J. Koga

研究成果: Conference article › 査読

抄録

A novel approach for achieving high-performance Schottky-source/drain MOSFETs (SBTs: Schottky Barrier Transistors) is proposed. The dopant segregation (DS) technique is employed and significant modulation of Schottky barrier height is demonstrated. The DS-SBT fabricated with the current CoSi₂ process show competitive drive current and better short-channel-effect immunity, compared to the conventional MOSFET. In conclusion, the DS-Schottky junction is useful for the source/drain of advanced MOSFETs.

本文言語	English
ページ（範囲）	168-169
ページ数	2
ジャーナル	Digest of Technical Papers - Symposium on VLSI Technology
出版ステータス	Published - 2004 10 1
イベント	2004 Symposium on VLSI Technology - Digest of Technical Papers - Honolulu, HI, United States 継続期間: 2004 6 15 → 2004 6 17

ASJC Scopus subject areas

電子工学および電気工学

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引用スタイル

@article{85b21553f71344a1b2acb13a900e035f,

title = "Solution for high-performance Schottky-source/drain MOSFETs: Schottky barrier height engineering with dopant segregation technique",

abstract = "A novel approach for achieving high-performance Schottky-source/drain MOSFETs (SBTs: Schottky Barrier Transistors) is proposed. The dopant segregation (DS) technique is employed and significant modulation of Schottky barrier height is demonstrated. The DS-SBT fabricated with the current CoSi2 process show competitive drive current and better short-channel-effect immunity, compared to the conventional MOSFET. In conclusion, the DS-Schottky junction is useful for the source/drain of advanced MOSFETs.",

author = "A. Kinoshita and Y. Tsuchiya and A. Yagishita and K. Uchida and J. Koga",

year = "2004",

month = oct,

day = "1",

language = "English",

pages = "168--169",

journal = "Digest of Technical Papers - Symposium on VLSI Technology",

issn = "0743-1562",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "2004 Symposium on VLSI Technology - Digest of Technical Papers ; Conference date: 15-06-2004 Through 17-06-2004",

}

TY - JOUR

T1 - Solution for high-performance Schottky-source/drain MOSFETs

T2 - 2004 Symposium on VLSI Technology - Digest of Technical Papers

AU - Kinoshita, A.

AU - Tsuchiya, Y.

AU - Yagishita, A.

AU - Uchida, K.

AU - Koga, J.

PY - 2004/10/1

Y1 - 2004/10/1

N2 - A novel approach for achieving high-performance Schottky-source/drain MOSFETs (SBTs: Schottky Barrier Transistors) is proposed. The dopant segregation (DS) technique is employed and significant modulation of Schottky barrier height is demonstrated. The DS-SBT fabricated with the current CoSi2 process show competitive drive current and better short-channel-effect immunity, compared to the conventional MOSFET. In conclusion, the DS-Schottky junction is useful for the source/drain of advanced MOSFETs.

AB - A novel approach for achieving high-performance Schottky-source/drain MOSFETs (SBTs: Schottky Barrier Transistors) is proposed. The dopant segregation (DS) technique is employed and significant modulation of Schottky barrier height is demonstrated. The DS-SBT fabricated with the current CoSi2 process show competitive drive current and better short-channel-effect immunity, compared to the conventional MOSFET. In conclusion, the DS-Schottky junction is useful for the source/drain of advanced MOSFETs.

UR - http://www.scopus.com/inward/record.url?scp=4544244783&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=4544244783&partnerID=8YFLogxK

M3 - Conference article

AN - SCOPUS:4544244783

SP - 168

EP - 169

JO - Digest of Technical Papers - Symposium on VLSI Technology

JF - Digest of Technical Papers - Symposium on VLSI Technology

SN - 0743-1562

Y2 - 15 June 2004 through 17 June 2004

ER -