Split capacitor DAC mismatch calibration in successive approximation ADC

Yanfei Chen, Xiaolei Zhu, Hirotaka Tamura, Masaya Kibune, Yasumoto Tomita, Takayuki Hamada, Masato Yoshioka, Kiyoshi Ishikawa, Takeshi Takayama, Junji Ogawa, Sanroku Tsukamoto, Tadahiro Kuroda

    研究成果: Conference contribution

    100 引用 (Scopus)

    抜粋

    A split capacitor DAC calibration method is proposed that a bridge capacitor larger than conventional design allows a tunable capacitor to compensate for mismatch. To guarantee proper calibration, a comparator with digital timing control offset cancellation is proposed. An 8-bit successive approximation ADC with 4b+4b split capacitor DAC calibration has been implemented in 65nm CMOS, achieving 0.3LSB DNL and INL with 180fF input capacitance.

    元の言語English
    ホスト出版物のタイトル2009 IEEE Custom Integrated Circuits Conference, CICC '09
    ページ279-282
    ページ数4
    DOI
    出版物ステータスPublished - 2009 12 1
    イベント2009 IEEE Custom Integrated Circuits Conference, CICC '09 - San Jose, CA, United States
    継続期間: 2009 9 132009 9 16

    出版物シリーズ

    名前Proceedings of the Custom Integrated Circuits Conference
    ISSN(印刷物)0886-5930

    Other

    Other2009 IEEE Custom Integrated Circuits Conference, CICC '09
    United States
    San Jose, CA
    期間09/9/1309/9/16

    ASJC Scopus subject areas

    • Electrical and Electronic Engineering

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  • これを引用

    Chen, Y., Zhu, X., Tamura, H., Kibune, M., Tomita, Y., Hamada, T., Yoshioka, M., Ishikawa, K., Takayama, T., Ogawa, J., Tsukamoto, S., & Kuroda, T. (2009). Split capacitor DAC mismatch calibration in successive approximation ADC. : 2009 IEEE Custom Integrated Circuits Conference, CICC '09 (pp. 279-282). [5280859] (Proceedings of the Custom Integrated Circuits Conference). https://doi.org/10.1109/CICC.2009.5280859