For the first time in the world, we achieved, at 77 K, a transistor and memory operation of a FET structure which was grown in a Tetrahedral-shaped recess (TSR-HEMT). This TSR-HEMT memory has a floating quantum dot (QD) gate at the bottom of the recess. Owing to the particular shape of the tetrahedral-shaped recess (TSR) structure, we were able to demonstrate that the charging of the floating QD gate can modulate the potential energy near the bottom by an amount of 9 meV and thus effectively modify the current. The measured I-V characteristics of the memory device clearly indicated a hysteresis at the sub-threshold gate bias region and a low power operation requiring write/erase voltages around only IV. The measured retention characteristics also showed that the device had a retention time of several minutes even at 100 K. We think that the TSR-HEMT is a promising structure for the use in future nanometer-scale microelectronics.
|ジャーナル||Technical Digest - International Electron Devices Meeting|
|出版ステータス||Published - 1998 12月 1|
|イベント||Proceedings of the 1998 IEEE International Electron Devices Meeting - San Francisco, CA, USA|
継続期間: 1998 12月 6 → 1998 12月 9
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