Three-dimensional packaging structure for 3D-NoC

Kikuo Wada, Shigekazu Hino, Nobuyuki Yamasaki

研究成果: Conference contribution

2 引用 (Scopus)

抜粋

In this paper, we propose a novel three-dimensional (3D) packaging structure for a network-on-chip (NoC) based a 3D system-on-chip (SoC). Our SiP is implemented by vertically connecting two homogeneous SoCs through an organic interposer; that is, two homogeneous SoCs are bonded face-to-face above and below the organic interposer. NoCs have routing capability that can communicate with each other even if opposing nodes are connected to different node pins, which enables high-speed communication between SoCs using low voltage and current. As the power supply and external I/O pins are implemented via the organic interposer, we performed simulations to assess power integrity (PI) and signal integrity (SI) compared to a conventional package. To assess vertical communication performance as a 3D package, we simulated high-speed characteristics using the organic interposer and through silicon vias (TSVs), and confirmed the superior performance of the organic interposer.

元の言語English
ホスト出版物のタイトルEDAPS 2013 - 2013 IEEE Electrical Design of Advanced Packaging Systems Symposium
ページ72-75
ページ数4
DOI
出版物ステータスPublished - 2013 12 1
イベント2013 6th IEEE Electrical Design of Advanced Packaging Systems Symposium, EDAPS 2013 - Nara, Japan
継続期間: 2013 12 122013 12 15

出版物シリーズ

名前EDAPS 2013 - 2013 IEEE Electrical Design of Advanced Packaging Systems Symposium

Other

Other2013 6th IEEE Electrical Design of Advanced Packaging Systems Symposium, EDAPS 2013
Japan
Nara
期間13/12/1213/12/15

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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  • これを引用

    Wada, K., Hino, S., & Yamasaki, N. (2013). Three-dimensional packaging structure for 3D-NoC. : EDAPS 2013 - 2013 IEEE Electrical Design of Advanced Packaging Systems Symposium (pp. 72-75). [6724392] (EDAPS 2013 - 2013 IEEE Electrical Design of Advanced Packaging Systems Symposium). https://doi.org/10.1109/EDAPS.2013.6724392