Through chip interface based three-dimensional FPGA architecture exploration

Li Chung Hsu, Masato Motomura, Yasuhiro Take, Tadahiro Kuroda

    研究成果: Article査読

    抄録

    This paper presents work on integrating wireless 3-D interconnection interface, namely ThruChip Interface (TCI), in three-dimensional field-programmable gate array (3-D FPGA) exploration tool (TPR). TCI is an emerging 3-D IC integration solution because of its advantages over cost, flexibility, reliability, comparable performance, and energy dissipation in comparison to through-silicon-via (TSV). Since the communication bandwidth of TCI is much higher than FPGA internal logic signals, in order to fully utilize its bandwidth, the time-division multiplexing (TDM) scheme is adopted. The experimental results show 25% on average and 58% at maximum path delay reduction over 2-D FPGA when five layers are used in TCI based 3-D FPGA architecture. Although the performance of TCI based 3-D FPGA architecture is 8% below that of TSV based 3-D FPGA on average, TCI based architecture can reduce active area consumed by vertical communication channels by 42% on average in comparison to TSV based architecture and hence leads to better delay and area product.

    本文言語English
    ページ(範囲)288-297
    ページ数10
    ジャーナルIEICE Transactions on Electronics
    E98C
    4
    DOI
    出版ステータスPublished - 2015 4 1

    ASJC Scopus subject areas

    • 電子材料、光学材料、および磁性材料
    • 電子工学および電気工学

    フィンガープリント

    「Through chip interface based three-dimensional FPGA architecture exploration」の研究トピックを掘り下げます。これらがまとまってユニークなフィンガープリントを構成します。

    引用スタイル