Software defined radio (SDR) is a technology that allows a single terminal to support various kinds of wireless systems by changing its software to reconfigure the wireless terminal. As a software defined radio (SDR) receiver platform, Sora has been developed recently, which is based on a general purpose processors (GPPs). In the SDR receiver, timing synchronization of OFDM signal consumes a significant amount of computational power in the GPP. In this paper, a new time synchronization scheme for the GPP based SDR platform is proposed. The proposed scheme reduces the amount of data transmission between the memory and the GPP. It is shown through the experiment that the proposed scheme reduces the number of cycles for timing synchronization by 1/5.