抄録
A high-speed and distributed ATM switch architecture, called the TORUS switch, is proposed with the aim of achieving a terabit-per-second ATM switching system. The switch is a distributed and scalable internal speed-up crossbar-type ATM switch with cylindrical structure. The self-bit-synchronization technique and optical interconnection technology are combined to achieve gigabit-rate cell transmission, where high-density implementation technologies such as multichip module technology are not required at all. Also, distributed contention control based on the fixed output-precedence scheme is newly adopted. This control is very suitable for high-speed devices because its circuit is achieved with only one gate in each crosspoint. A TORUS switch is fabricated as a 4 × 2 switch module using optical interconnection technology and very high-speed crosspoint LSI's, constructed using an advanced Si-bipolar process. Measured results confirm that the TORUS switch can be used to realize an expandable terabit-rate ATM switch.
| 本文言語 | English |
|---|---|
| ページ（範囲） | 817-828 |
| ページ数 | 12 |
| ジャーナル | IEEE Journal on Selected Areas in Communications |
| 巻 | 15 |
| 号 | 5 |
| DOI | |
| 出版ステータス | Published - 1997 6 1 |
| 外部発表 | はい |
ASJC Scopus subject areas
- Computer Networks and Communications
- Electrical and Electronic Engineering