Trax solver on Zynq with Deep Q-Network

Naru Sugimoto, Takuji Mitsuishi, Takahiro Kaneda, Chiharu Tsuruta, Ryotaro Sakai, Hideki Shimura, Hideharu Amano

研究成果: Conference contribution

5 被引用数 (Scopus)

抄録

A software/hardware co-design system for a Trax solver is proposed. Implementation of Trax AI is challenging due to its complicated rules, so we adopted an embedded system called Zynq (Zynq-7000 AP SoC) and introduced a High Level Synthesis (HLS) design. We also added Deep Q-Network, a machine learning algorithm, to the system for use as an evaluation function. Our solver automatically optimizes its own evaluation function through games with humans or other AIs. The implemented solver works with a 150-MHz clock on the Xilinx XC7Z020-CLG484 of a Digilent ZedBoard. A part of the Deep Q-Network job can be executed on the FPGA of the Zynq board more than 26 times faster than with ARM Coretex-A9 650-MHz software.

本文言語English
ホスト出版物のタイトル2015 International Conference on Field Programmable Technology, FPT 2015
出版社Institute of Electrical and Electronics Engineers Inc.
ページ272-275
ページ数4
ISBN(印刷版)9781467390910
DOI
出版ステータスPublished - 2016 1 25
イベントInternational Conference on Field Programmable Technology, FPT 2015 - Queenstown, New Zealand
継続期間: 2015 12 72015 12 9

Other

OtherInternational Conference on Field Programmable Technology, FPT 2015
CountryNew Zealand
CityQueenstown
Period15/12/715/12/9

ASJC Scopus subject areas

  • Computer Science Applications
  • Hardware and Architecture
  • Software

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