TY - GEN
T1 - Ultralow-voltage design and technology of silicon-on-thin-buried-oxide (SOTB) CMOS for highly energy efficient electronics in IoT era
AU - Kamohara, Shiro
AU - Sugii, Nobuyuki
AU - Yamamoto, Yoshiki
AU - Makiyama, Hideki
AU - Yamashita, Tomohiro
AU - Hasegawa, Takumi
AU - Okanishi, Shinobu
AU - Yanagita, Hiroshi
AU - Kadoshima, Masaru
AU - Maekawa, Keiichi
AU - Mitani, Hitoshi
AU - Yamagata, Yasushi
AU - Oda, Hidekazu
AU - Yamaguchi, Yasuo
AU - Ishibashi, Koichiro
AU - Amano, Hideharu
AU - Usami, Kimiyoshi
AU - Kobayashi, Kazutoshi
AU - Mizutani, Tomoko
AU - Hiramoto, Toshiro
N1 - Publisher Copyright:
© 2014 IEEE.
PY - 2014/9/8
Y1 - 2014/9/8
N2 - Ultralow-voltage (ULV) operation of CMOS circuits is effective for significantly reducing the power consumption of the circuits. Although operation at the minimum energy point (MEP) is effective, its slow operating speed has been an obstacle. The silicon-on-thin-buried-oxide (SOTB) CMOS is a strong candidate for ultralow-power (ULP) electronics because of its small variability and back-bias control. These advantages of SOTB CMOS enable power and performance optimization with adaptive Vth control at ULV and can achieve ULP operation with acceptably high speed and low leakage. In this paper, we describe our recent results on the ULV operation of the CPU, SRAM, ring oscillator, and, other logic circuits. Our 32-bit RISC CPU chip, named 'Perpetuum Mobile,' has a record low energy consumption of 13.4 pJ when operating at 0.35 V and 14 MHz. Perpetuum-Mobile micro-controllers are expected to be a core building block in a huge number of electronic devices in the internet-of-things (IoT) era.
AB - Ultralow-voltage (ULV) operation of CMOS circuits is effective for significantly reducing the power consumption of the circuits. Although operation at the minimum energy point (MEP) is effective, its slow operating speed has been an obstacle. The silicon-on-thin-buried-oxide (SOTB) CMOS is a strong candidate for ultralow-power (ULP) electronics because of its small variability and back-bias control. These advantages of SOTB CMOS enable power and performance optimization with adaptive Vth control at ULV and can achieve ULP operation with acceptably high speed and low leakage. In this paper, we describe our recent results on the ULV operation of the CPU, SRAM, ring oscillator, and, other logic circuits. Our 32-bit RISC CPU chip, named 'Perpetuum Mobile,' has a record low energy consumption of 13.4 pJ when operating at 0.35 V and 14 MHz. Perpetuum-Mobile micro-controllers are expected to be a core building block in a huge number of electronic devices in the internet-of-things (IoT) era.
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U2 - 10.1109/VLSIT.2014.6894413
DO - 10.1109/VLSIT.2014.6894413
M3 - Conference contribution
AN - SCOPUS:84907701197
T3 - Digest of Technical Papers - Symposium on VLSI Technology
BT - Digest of Technical Papers - Symposium on VLSI Technology
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 34th Symposium on VLSI Technology, VLSIT 2014
Y2 - 9 June 2014 through 12 June 2014
ER -