Unified understanding of Vth and Id variability in tri-gate nanowire MOSFETs

M. Saitoh, K. Ota, C. Tanaka, Y. Nakabayashi, K. Uchida, T. Numata

    研究成果: Conference contribution

    12 引用 (Scopus)

    抜粋

    We present the systematic study of Vth and Idlin/ Idsat variability of nanowire transistors (NW Tr.) with various parameters (NW width (WNW) and height (HNW) down to 10nm, NW number (NNW), NW directions, channel dopants). By adopting NW circumference as Weff, the universal line appears in Pelgrom plot of both σVth and σId for a wide range of gate length (Lg), WNW and HNW. We found A vt reduction in NW Tr. compared to planar SOI Tr. due to gate grain alignment. Deviation of σVth and σIdlin of the narrowest Tr. from the universal line was eliminated by suppressing the parasitic resistance (RSD). σIdsat and σI dlin in NW Tr. can be reduced by improving the surface-roughness- limited mobility and its variations, respectively.

    元の言語English
    ホスト出版物のタイトル2011 Symposium on VLSI Technology, VLSIT 2011 - Digest of Technical Papers
    ページ132-133
    ページ数2
    出版物ステータスPublished - 2011 9 16
    イベント2011 Symposium on VLSI Technology, VLSIT 2011 - Kyoto, Japan
    継続期間: 2011 6 142011 6 16

    出版物シリーズ

    名前Digest of Technical Papers - Symposium on VLSI Technology
    ISSN(印刷物)0743-1562

    Other

    Other2011 Symposium on VLSI Technology, VLSIT 2011
    Japan
    Kyoto
    期間11/6/1411/6/16

    ASJC Scopus subject areas

    • Electrical and Electronic Engineering

    フィンガープリント Unified understanding of V<sub>th</sub> and I<sub>d</sub> variability in tri-gate nanowire MOSFETs' の研究トピックを掘り下げます。これらはともに一意のフィンガープリントを構成します。

  • これを引用

    Saitoh, M., Ota, K., Tanaka, C., Nakabayashi, Y., Uchida, K., & Numata, T. (2011). Unified understanding of Vth and Id variability in tri-gate nanowire MOSFETs. : 2011 Symposium on VLSI Technology, VLSIT 2011 - Digest of Technical Papers (pp. 132-133). [5984644] (Digest of Technical Papers - Symposium on VLSI Technology).